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Classified版 - Job Opening in Broadcom: Principal Logic Design Engineer - SATA Expert
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b**t
发帖数: 102
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Principal Logic Design Engineer - SATA Expert
The Processor Division of Broadcom Corporation is well known in the
semiconductor industry for providing super high-performance multi-core
network microprocessors. We are staffing up in critical R&D areas in the
high-rise facility at Highway 101 & Great America Parkway
As a senior Logic Design Engineer you will be responsible for performing
micro-architecture and logic design in the development of I/O devices in
high performance multi-threaded, multicore CPU design. The efficiency of
various on-chip interfaces will be key to delivering maximum performance in
the system.
This is an opportunity to broaden your chip and system view as a member of a
key-contributing group at Broadcom. The Multi-core XLP Network Processor
has been touted “An Exceptional CPU, well beyond the capabilities of other
embedded processors” by The Microprocessor Report, July 2010.
Responsibilities:
• Develop micro-architecture specification for assigned I/O block(s)
• Implement the RTL code for the unit.
• Collaborate with verification team in the development of testplan,
testbench and tests; and assist in debugging of test failures.
• Support physical design team in writing timing constraints, analyze
timing violations and perform timing fixes in RTL.
• Own and drive future design of additional I/O blocks
*LI-VV1
Job Requirements • Experience required is typically a BSEE degree
and 12 years of experience, an MSEE degree 9 and years of experience or a
PhD EE and 6 years of experience or equivalent.
• SATA expertise preferred
• Working knowledge of IO devices such as SATA, SRIO, I2C, UART and
various Flash interfaces.
• Working knowledge of Verilog, multi-domain clock synchronization,
pipelining, various flow control methods and low-power techniques.
• Excellent written and verbal communication skills.
*LI
Country United States
State/Province California
City/Town Santa Clara
Shift 1st Shift - Day
Percent of Travel Required 5% - 10%
Function Engineering
Discipline IC Design
1 (共1页)
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